Darren Jones

Darren has 25 plus years of processor design and verification experience. As VP of Engineering at Wave Computing he was responsible for the successful tapeout of a novel 16nm CGRA chip for Machine Learning as well as the second gen 7nm design. Prior to that, he held engineering leadership positions at Xilinx, and MIPS Technologies driving successful SOC tapeouts and processor IP development. Darren received a BSEE from the University of Illinois and an MSEE from Stanford University. He has co-authored more than 20 patents.