Cory Voisine

Cory Voisine has been working in the semiconductor industry since 1997. Cory began as a Design Intern at Quadic Systems, then moved to National Semiconductor in 1998 as a Senior Analog IC Designer, where they designed LVDS products for the Interface Group and phase-locked loops for the Internet Appliances Group. In 2003, Voisine was appointed Principal Analog IC Designer, Team Lead at Allegro MicroSystems. Cory then moved to Fairchild Semiconductor in 2006 as a Principal Analog IC Designer, and returned to Allegro MicroSystems in 2009 as a Principal Analog IC Designer, Team Lead. Voisine is currently a Principal PMIC Design Engineer at Eta Wireless, a Murata Company.

Cory Voisine obtained a Master of Science in Electrical Engineering (MSEE) from the University of Maine between 1998 and 2000. Prior to that, they obtained a Bachelor of Science in Electrical Engineering (BSEE) from the University of Maine between 1993 and 1998.