Mathieu Allard

Mathieu Allard is a Senior FPGA Designer at EXFO, with a tenure beginning in July 2012. Prior to this role, Mathieu served as a Chargé de laboratoire at École Polytechnique de Montréal from September 2009 to September 2012, conducting laboratory sessions for courses related to FPGA technology. Mathieu gained additional experience as an intern at Gage Applied Technologies, focusing on FPGA architecture design, and at Hardent, where skills in Verilog, VHDL, and SystemVerilog were developed. Early experience includes an internship at Matrox, working on C++ applications and technical problem-solving. Mathieu holds a Master of Science in Applied Electrical Engineering (Microelectronics) and a Bachelor's degree in Electrical and Electronics Engineering, both from Polytechnique Montréal.