Adrian Fiergolski

Senior Digital Circuit Designer and Verification Engineer at Fastree3D

Adrian Fiergolski has worked in the electronics engineering field since 2009. Adrian began their career at CERN, where they held the positions of Electronics Engineer (CERN Senior Fellow), FPGA Design Engineer, and FPGA Developer. During their time at CERN, they worked on Data Acquisition Systems (DAQ) for Linear Collider Detector (LCD) hardware R&D studies, designing, commissioning, testing and supporting hardware, developing HDL code for FPGA-based systems, and creating drivers for embedded systems and software for hardware control. In 2018, they joined Fastree3D as a Senior Digital Circuit Designer and Verification Engineer. Their duties included ASIC and FPGA design and verification, embedded Linux, and low-level software development for a flash LiDAR camera. Adrian was responsible for digital SoC architecture design and the frontend part of the ASIC design flow, as well as leading extensive coverage-driven verification based on System Verilog and Universal Verification Methodology (UVM).

Adrian Fiergolski received a Doctor of Philosophy - PhD in Electronics and Computer Engineering from Warsaw University of Technology in 2015. Adrian also obtained a Master of Engineering (MEng) in Electronics and Computer Engineering from the same university in 2010.

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  • Senior Digital Circuit Designer and Verification Engineer

    March, 2018 - present