JP

Jaemin Park

Senior Fpga/asic/dsp Designer & Tech Leader at Fidus Systems

Jaemin Park is a seasoned Electronic Engineer with over 30 years of experience in hardware, ASIC, FPGA, DSP, and firmware design and implementation. Currently serving as a Senior FPGA/ASIC/DSP designer and Tech Leader at Fidus Systems Inc since April 2002, Jaemin has previously held positions at Tality and Cadence as an ASIC/FPGA designer, as well as a Senior H/W engineer at Samsung Electronics for a decade, gaining extensive knowledge in telecommunications. Jaemin holds a Master's degree in Computer Science from the Korea Advanced Institute of Science and Technology and a Bachelor's degree in Computer Engineering from Seoul National University. Jaemin's professional motto focuses on automation in engineering processes.

Location

Milpitas, United States

Links

Previous companies


Org chart

No direct reports

Teams


Offices

This person is not in any offices


Fidus Systems

Fidus specializes in leading-edge electronic product development. Our hardware, software, FPGA and signal integrity teams architect, design and deliver next-generation products for clients in emerging technology markets. We build long-term relationships by consistently exceeding expectations. Since 2001, Fidus has completed nearly 3000+ projects for 400+ customers in a variety of industries. By leveraging in-house expert knowledge and utilizing industry leading tools, we deliver excellence in: • FPGA • Signal Integrity • Software • Hardware • PCB Layout • Wireless • Mechanical Fidus is proud to be selected and recognized as the Inaugural Premier Design Services Partner for AMD’s Adaptive & Embedded Computing (formerly Xilinx). Interested in joining a dynamic, talented and supportive team? Visit our Career Page: http://fidus.com/company/careers/


Headquarters

Ottawa, Canada

Employees

51-200

Links