Vinod N.

Vinod N. has over 13 years of work experience in the field of engineering. Vinod is currently employed as a Principal Engineer at Fungible, Inc. since August 2019. Prior to this, Vinod worked at Xilinx for 9 years, starting as a Design Engineer II in October 2010 and progressing to roles such as Senior Design Engineer I and II. Vinod'smost recent role at Xilinx was a Technical Engineering Manager, where they were responsible for leading the verification of new generation Xilinx SoCs, including PCIE and CCIX verification. Vinod also gained exposure to full-chip level features such as DFx, IJTAG, and Scan functions. Before joining Xilinx, Vinod worked at Microchip Technology as a Design Engineer II from April 2008 to September 2010. Vinod also had a brief tenure at Transwitch as an Associate Design Engineer from October 2007 to March 2008, and at NXP after its acquisition of Freescale Semiconductor as a Design Verification Engineer from October 2006 to September 2007.

Vinod N. pursued a Master's degree in Electrical, Electronics and Communications Engineering from Nirma University from 2005 to 2007. Additionally, Vinod obtained a certification in System Verilog by Donmills, though no information regarding the institution or the exact year of obtaining the certification is provided.