Brian Cassell

Principal Verification Engineer at Geo Semiconductor

Brian Cassell has extensive work experience in the semiconductors industry. Brian is currently working as a Principal Verification Engineer at indie Semiconductor since 2023. Prior to that, they held the same role at GEO Semiconductor, Inc. starting in 2022. Before that, they served as an SMTS Silicon Design Engineer at AMD from 2020 to 2022. Brian also worked as a Staff Engineer at Marvell Semiconductor from 2018 to 2020 and as a Principal Engineer at Cavium Inc from 2013 to 2020. Earlier in their career, they held positions such as Senior Design Engineer at AMD from 2011 to 2013, Senior Verification Engineer at NVIDIA from 2009 to 2011, and Hardware Engineer at SiCortex from 2005 to 2009. Brian also gained some initial work experience as an Intern at Digitalks in 2003. In these roles, Brian has been involved in various aspects of microprocessor verification, software testing, diagnostics, functional vectors, and ASIC verification. Brian has experience in developing testplans, testbenches, protocol checkers, predictors/models, and functional coverage.

Brian Cassell obtained their Master of Science degree in Computer Systems Engineering from Boston University, completing their education from 2000 to 2005.

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Timeline

  • Principal Verification Engineer

    January, 2022 - present