Ashwin K N is an experienced engineering professional with a background in physical design and application engineering. Ashwin began a technical internship at Synopsys Inc in September 2017, contributing to Clock Tree Synthesis within the ICC2 team and enhancing quality of results across multiple node designs until July 2018. Following this, Ashwin held the position of ASIC Physical Design Engineer at Intel Corporation from November 2018 to June 2022, focusing on PPA and test chip activities for RISC V and ARM CPU core implementations. Currently, Ashwin serves as an Application Engineer at Google, a position held since June 2022. Ashwin holds a Bachelor of Engineering degree in Electronics and Communications Engineering from RV College of Engineering, completed in 2017.
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