Chi-Chun Lai

Chi-Chun (Barry) Lai is an experienced ASIC and hardware design engineer with a strong background in electrical engineering. With a Master's Degree from the University of California, San Diego, and a Bachelor's Degree from National Taiwan University, Chi-Chun has held various positions, including Staff ASIC Design Engineer at 芯湖科技 and Senior ASIC Design Engineer at Marvell Semiconductor, where work included designing new modules for NVMe SSD controllers. Additionally, Chi-Chun has experience as a Senior Hardware Engineer at Cavium Inc and GOKE Taiwan Research Laboratory, as well as an ASIC RTL Engineer at 谷歌 since September 2020. Prior to these roles, a solid foundation in embedded hardware design was established during studies at UCSD, further complemented by an internship at Broadcom, focusing on IC design and verification.