Dharmesh Italiya has extensive experience in the technology and engineering sectors, with roles spanning senior engineering and management positions at renowned companies. Notably, Dharmesh served as a Senior Member of Consulting Staff at Cadence Design Systems Ltd. from March 2001 to February 2012 and held various roles at AMD as a GPU DV Engineer from July 2018 to April 2022. Additional significant positions include Technical Architect and Engineering Director at Cadence Design Systems, and Staff Engineer/Manager at Qualcomm India Pvt Ltd. Currently, Dharmesh is a Senior Design Engineer at Google, bringing a strong foundation in Instrumentation & Control from the University and specialized knowledge in ASIC chip design from Calorex.
This person is not in the org chart
This person is not in any teams
This person is not in any offices