Kamesh Vedula is an experienced hardware engineer with a strong background in physical design and layout verification. Kamesh began career at Magma Design Automation from February 2008 to March 2012 as a Member of Technical Staff, leading rule deck development for major foundries and engaging in performance improvement benchmarks. Kamesh then worked as a Staff Engineer at Broadcom from April 2012 to June 2015, overseeing physical verification for advanced design nodes. Following this, Kamesh spent time at Synopsys Inc. from June 2015 to January 2019 as a Member of Consulting Staff, focusing on physical/layout verification deployment and extraction at advanced nodes. Currently, Kamesh serves as a Hardware Engineer at Google. Kamesh holds a Master of Science in Computer Science from Ira A. Fulton Schools of Engineering at Arizona State University, alongside degrees in Electronics and Communications and Microelectronics and VLSI design from Jawaharlal Nehru Technological University and the International Institute of Information Technology, respectively.
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