Liem Giap possesses extensive experience in physical design engineering, having worked at various companies including Socionext ASIA, Synapse Design Inc., Google, and NXP Semiconductors. Notable contributions include substantial work on DDR4 Multi PHY full flow, where skills in FloorPlan, Layout Implementation, and Timing Specification were developed. Liem's expertise also encompasses Design for Testability, including SCAN Implementation and ATPG, as well as proficiency in scripting languages like Perl, C-shell, and Tcl. Previous roles involved implementing stages in Magma Design Flow and performing Clock Tree Synthesis while analyzing Crosstalk Noise. Liem holds a Bachelor's degree in Integrated Circuit Design from Viet Nam National University- University of Science HCMC, obtained in 2014, and has engaged in various relevant projects during academic and professional pursuits.
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