Nitin Ahuja has extensive experience in the field of formal verification and design engineering, with roles at multiple prestigious companies. Currently, Nitin serves as a Member of the Technical Program Committee for DVCon India and has previously held positions such as Formal Verification Engineer and Silicon Design Verification Manager at Google. Nitin's career includes significant contributions at Qualcomm as a Staff Formal Verification Engineer, Synopsys Inc as a Lead and Staff Formal Verification Specialist, and STMicroelectronics as a Sr. Design Engineer. Additional experience encompasses roles at Accellera Systems Initiative, Cadence Design Systems, and various internships, demonstrating a solid foundation in technical expertise and leadership within the industry.
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