Ping-Wei Huang is a seasoned software engineer with extensive experience in the field of electronic design automation and silicon CAD. At Synopsys Inc, from March 2021 to December 2023, Ping-Wei developed and maintained the global routing engine in IC Compiler II. Since July 2024, Ping-Wei has served as a Silicon CAD Engineer on the Google CPU team. Prior experience includes roles as an undergraduate researcher and teaching assistant at National Taiwan University, where involvement in the Electronic Design Automation Lab contributed to research on quantum circuits and participation in international competitions. Additional experience includes a research internship at Academia Sinica, focusing on object detection and classification for CVPR 2018. Ping-Wei holds a Bachelor's degree in Engineering and a Master's degree in Electrical and Electronics Engineering, both from National Taiwan University.
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