Pushkar P.

Pushkar P. has extensive experience in the field of engineering, with a strong focus on memory interfaces, design verification, and post-silicon validation. Beginning as the owner of P L Enterprises, specializing in voltage stabilizers, Pushkar transitioned into roles at various prominent companies including Somarouthu Technologies and ServerEngines, where responsibilities included RTL modeling and ASIC engineering. At LSI Corporation, significant contributions were made in DDR PHY design and verification, while at Cadence Design Systems, Pushkar led a global engineering team in DDR IP integration and validation. Critical roles at Intel Corporation involved leading post-silicon validation for high-speed memory interfaces, culminating in the current position at Google focused on memory silicon validation. Educational background includes studies at Victoria University.