Sanjay Deep Sanjeev is an experienced ASIC RTL Engineer at Google since June 2021, with prior experience as an ASIC Digital Design Engineer II at Synopsys Inc from July 2018 to June 2021, specializing in digital signal processing IP design. Sanjay holds a Master of Technology in Electronic System Design - System on Chip from the International Institute of Information Technology, Bangalore, completed in 2018, and a Bachelor of Technology in Electrical, Electronics, and Communications Engineering from the College of Engineering, Trivandrum, earned in 2015.
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