Satyendra Soni

Senior Design Verification Engineer

Satyendra Soni is an ASIC DV lead at Google, bringing extensive experience in the semiconductor industry. They have a robust background in RTL verification and GLS verification at both the IP level and subsystem level, having contributed to numerous tape-outs of Image Processing and Video Processing SoCs. Satyendra has hands-on experience in constraint random verification, low power verification, and UVM, complemented by strong debugging skills and a commitment to teamwork. They hold a Master of Technology (M.Tech.) in Electrical, Electronics and Communications Engineering from IIT Delhi, completed in 2012.

Location

Bengaluru, India

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