Yosef Hai Amar

Senior RTL Design Engineer

Yosef Hai Amar is an accomplished engineer with extensive experience in VLSI design and architecture. Starting a career at Broadcom as a VLSI Design & Verification Engineer, Yosef transitioned to Metalink as a VLSI Engineer before joining Lantiq as a Senior VLSI Design Engineer, where contributions were made until the company was acquired by Intel. At Intel Corporation, from June 2020 to July 2025, Yosef held various roles including Senior VLSI Logic Design Engineer and Silicon IP Architect in the Networking Division, as well as leading the WiFi AP MAC VLSI Design Team in the Connected Home Division. Currently, Yosef serves as a Senior RTL Design Engineer at Google. Yosef holds a degree in Electronic Engineering from Tel Aviv University, obtained in 2006.

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Israel

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