Ganesan C. is a Senior Design Verification Engineer with extensive experience in ASIC/SoC pre-silicon verification and emulation, particularly in NVMe/PCIe SSD Controller and Data Center Solutions. They have previously held technical roles at companies including HCL America Inc., Microchip Technology Inc., and Cadence Design Systems, where they led teams in developing emulation models and enhancing simulation performance. Ganesan's expertise includes mentoring, system-level debugging, and programming in multiple languages, and they currently contribute to innovative projects at Groq. They earned a Bachelor of Engineering degree from PSG College of Technology.
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