Farhud Tebbi

Farhud Tebbi has over 20 years of experience in the engineering and design field. Farhud began their career in 1997 as a Senior ASIC Design Engineer at Teradyne, where they architected and designed a multi-million gate Pattern Generator ASIC to Control the test system during the execution of a functional test program with multiple clocks. Farhud then moved to FutureLogic, Inc. in 2007, where they were a Senior Hardware Engineer and was responsible for architecting and designing the TableX System, GEN3 Evolution coupon printer, and Promotional couponing (Promonet). In 2015, they joined AeroVironment as a Senior Staff Engineer and was responsible for Trade Study, Risk Analysis, System Architecture, Component Evaluation and Selection, System Requirements, Electrical Specs, Power Analysis, and Smart Battery Selection of a new UAV system. Most recently, in 2017, they joined GuRu as a Lead Digital System Engineer, where they were responsible for architecting and designing Communication protocol on Lattice FPGA (MachXO3), Focusing Algorithm on Xilinx FPGA (Zynq), and implementing ARM Cortex-M0 on Xilinx FPGA for SOC verification.

Farhud Tebbi obtained a Bachelor's Degree in Electrical and Electronics Engineering from Sharif University of Technology between 1985 and 1990. Farhud then went on to earn a Master's Degree in Electrical and Electronics Engineering from the University of Southern California between 1995 and 1997.