The Engineering Team at HDL Design House develops innovative digital, analog, and back-end design solutions for complex SoC and FPGA designs. They focus on creating high-quality IP cores and component models, utilizing Cadence tools and flows. The team's diverse skill set includes firmware development, digital design, and emulation, enabling them to deliver competitive, reliable, and flexible design services to major SoC product developers.
Dijana Kević
Firmware Developer
Filip Mijuskovic
Emulation Engineer
Maja Krneta
Digital Design Engineer
Marija Kovačević
Firmware Engineer
Mihajlo Karlicic
Senior Firmware Engineer
Milan Vidanovic
Firmware Engineer
Nenad Stefanov
Digital Design Engineer
Nikola Neskovic
Firmware Engineer
Nikos L.
Digital Design Engineer
Rafail Dimitrios Dal...
Junior Design Engineer
Stevan Stevanovic
Digital Design Engineer
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