Alberto Vidal

Alberto Vidal is an experienced FPGA Design Engineer specializing in VHDL hardware development for Defense projects at Indra since May 2016, where responsibilities include the design and implementation of VHDL cores for Xilinx FPGA devices. Prior to this role, Alberto served as a Firmware Engineer at GENERA Soluciones Tecnológicas from November 2011 to February 2016, focusing on all phases of FPGA firmware development, including specification, design, testing, and documentation across various technological sectors. Alberto began a career as a Trainee Electronic Engineer at Centro de Electrónica Industrial - UPM from February 2009 to December 2010, where involvement included embedded system design using Xilinx tools and VHDL hardware design. Alberto holds a Licenciatura degree in Industrial Engineering from Universidad Politécnica de Madrid, completed in 2011.