Infineon
Virendra Agarwal is an accomplished engineer with extensive experience in digital design and concept development. Currently serving as Principal Engineer for Digital Design and Concept at Infineon Technologies since January 2022, Virendra has previously held significant roles including Senior Design Engineer at INOVA Semiconductors GmbH, Principal and Senior Design Engineer at Toshiba Electronics Europe GmbH, and Tech Lead at KPIT Infosystems, where expertise in ARM-based SoC design was honed. Earlier career highlights include positions as Sr. Member Technical Staff at Intel and Design Engineer at CG CoreEl Programmable Solutions. Virendra earned a Bachelor of Engineering degree in Electronics from PES College of Engineering in Aurangabad between 1998 and 2001.
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