Vanitha H is an analog layout engineer with extensive experience in memory layout design for both dual port and single port SRAM in 28nm and 45nm technologies. They have hands-on experience with standard cell layouts and have designed analog layouts such as operational amplifiers and differential amplifiers. Vanitha possesses a strong understanding of reliability physics and has worked with tools like Calibre, Assura, and Cadence Virtuoso. Currently a Senior Layout Engineer at Insemi Technology Services Pvt. Ltd., they previously held positions at Analog Port, RV-VLSI, and Capgemini. Vanitha earned a Bachelor of Engineering in Electronics and Communications from Global Academy of Technology.
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