Daksha Sharma

Daksha Sharma is an accomplished AI/ML Performance Architect at Intel Corporation, where work has focused on enabling AI inference use cases on advanced FPGAs since February 2013. Previous roles at Intel include SoC Architect and Performance Engineer, contributing to cutting-edge technology. Earlier experience includes a position as Senior Design Engineer, specializing in PCIe Gen4 development, and as an Analog Design Engineer, where responsibilities included designing key components like DRV LDOs and power NMOS. A Graduate Technical Intern role at Intel involved addressing challenges in mixed-signal block design, and academic support was provided as a Teaching Assistant at DA-IICT. Daksha Sharma holds a Master’s degree in Electrical Engineering from the University of Michigan.