Hitesh Dadlani has a solid background in engineering with a Bachelor of Engineering in Electrical, Electronics, and Communications Engineering and a Master of Technology in VLSI. Experience includes a role as a Testing Engineer at Hitachi Hi-Rel Power Electronics and work as a SoC Design Engineer at Intel Corporation, where Hitesh contributed to simulation build flows and migrated a codebase from Perl to Python, enhancing the development environment. Additionally, Hitesh completed a Graduate Technical Internship at Intel, focusing on test plans and executing test cases for frontend tools while achieving significant reductions in turnaround time through automation. A strong proficiency in UNIX environments and shell scripting complements Hitesh's technical skill set.
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