James Wang

James Wang has extensive experience in ASIC development and engineering, currently serving as Principal Engineer at Western Digital Corporation since December 2014. Wang has a proven track record of designing complex systems, including the implementation of a parameterized Interprocessor Messaging Unit for high-end SSD controllers. Previous roles include Senior Staff Engineer at Crest Microsystems, where low power designs were verified, and Design Engineering Manager Sr. at AGIGA Tech, where an SoC chip based on the 8051 processor was developed. Additional experience encompasses management and design roles at companies such as Vixel Corporation, Qlogic Corporation, and Emulex Corporation, with a strong emphasis on ASIC design, verification, and architecture. Wang holds a Master's degree in Electrical Engineering from UC Irvine, earned between 1979 and 1989.