Suresh Checka

Suresh Checka is an Engineering Manager at Intel Corporation, overseeing teams focused on low power circuits for IoT products since October 2016. With a solid background in circuit design management from Synopsys Inc, where Suresh managed A&MS Circuit Design from September 2010 to September 2016, experience includes expertise in DDR PHY and various memory standards. Prior roles at Virage Logic and NXP Semiconductors involved significant contributions to I/O library development and technology management. Suresh began a career in design engineering at El Camino Microelectronics and has consistently progressed through increasingly responsible positions. Suresh holds a Bachelor's degree in Electronics and Communication from the Bangalore Institute of Technology.