Cyril Collineau

Cyril Collineau is a seasoned FPGA senior architect at IRT b-com, where responsibilities include defining architecture and developing components for 5G Radio, Centralized, and Distributed Units while focusing on innovative technologies for high performance and efficiency. Previous experience includes freelance engineering roles at AVIWEST and RF-Track, leadership in developing watermarking solutions at Civolution, and technical leadership in System-On-Chip design at RENESAS. Cyril also contributed to the development of a 3G base station emulator at Mitsubishi Corporation, hardware and software systems design at Thales and Philips, and ultrasonic measurement technologies at NDT Systems and R/D Tech. Education culminated in a Master of Science in Electrical and Electronics Engineering from ESEO.