Yu De Chen is a Technical Manager at 科林研發, specializing in semiconductor process and integration, including Logic, DRAM, and 3D NAND technologies. Previously, Yu served as a Sr. R&D Engineer at 聯華電子股份有限公司, focusing on lithography, process emulation, and DTCO applications. With extensive experience managing advanced process projects and providing technical support, Yu has contributed to several publications and holds multiple patents in process modeling. Yu earned a Master's degree in Applied Mechanics from National Taiwan University and a Bachelor's degree in Engineering from 國立成功大學, where they were recognized as an outstanding student.
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