Shreedutt Hegde

Shreedutt Hegde is a Senior ML RTL Engineer at Lattice Semiconductor, leading the hardware efforts for the SensAI ML solution stack, with a focus on designing machine learning systems for low power edge devices. Prior experience includes serving as a Senior Machine Learning Optimization Engineer at Velodyne Lidar, where Shreedutt specialized in deploying Lidar-based object detection neural network models on embedded platforms and optimizing model quantization for performance. Previous roles also encompass positions as a Senior FPGA Design Engineer and Research Assistant at various institutions, including Carnegie Mellon University, where Shreedutt contributed to projects involving reconfigurable logic and sparse matrix optimization. Shreedutt holds a Master's degree in Electrical and Computer Engineering from Carnegie Mellon University and a Bachelor’s degree in Electronics and Communications Engineering from Vellore Institute of Technology.