Joseph Stadolnik III

Joseph Stadolnik III is an experienced engineering professional currently serving as a Design Verification Engineer at Lightmatter since June 2021. Prior to this role, Joseph held the position of Director Of Engineering at Marvell Semiconductor from July 2018 to April 2021, focusing on the design verification of a PCIe sub-system with a high-performance DMA engine. Joseph has extensive experience in design verification from previous roles as a Principal Hardware Engineer at Cavium Inc, where oversight included PCI/PCI Express design verification and leading verification efforts for specific product lines, and as a Staff Engineer at C Port LLC. Additional experience includes consulting work at Zaiq Technologies and senior engineering responsibilities at Lockheed Martin, which involved system architectural modeling and ASIC design. Joseph earned a Master's degree in Electrical Engineering and a Bachelor's degree in Electrical and Computer Engineering from Worcester Polytechnic Institute.