Karan Niketan Dixit

Karan Niketan Dixit is a Senior Analog Layout Design Engineer at Marvell Technology since July 2023, where responsibilities include working on advanced projects such as a hysteresis comparator, clock buffers, and analog multiplexers, all developed using 2nm and 5nm TSMC processes. Prior experience includes a role as a Process Quality Engineer at Vivo from July 2019 to March 2020. Karan is pursuing an M.Tech in VLSI at Vellore Institute of Technology (2022-2024) and holds a Bachelor of Technology in Electronics and Communication Engineering from Noida Institute of Engineering & Technology (2015-2019).