Lawrence Said

Lawrence Said is a Principal Engineer at Marvell Technology since January 2022, with extensive experience in verification engineering. Prior roles include Senior Verification Engineer at Rianta Solutions Inc. and Ciena, as well as Design Verification Engineer at Rianta Solutions Inc. and Hardware Engineer II at Cisco Systems. Lawrence has developed expertise in block and cluster-level verification, SystemVerilog with VMM and UVM, and formal verification techniques. Key accomplishments include pioneering sequence adaptation for UVM sequences and co-authoring an IP-centric methodology for ASIC development. Lawrence's early career includes an internship at Hydro Québec, where a GRAFCET Simulation bench infrastructure was developed, and a research assistant position at Concordia University, contributing to advancements in dynamic blood analysis. Lawrence holds a Bachelor's degree in Electrical and Electronics Engineering from McGill University.