Shashank H S

Senior Physical Design Engineer

Shashank H S is a Senior Physical Design Engineer with extensive experience in physical design, timing signoff, and power verification across various technology nodes including 16nm, 28nm, 40nm, and others. Currently working at MaxLinear, Shashank is focused on block level place and route, physical verification, and chip level analysis. Previously, Shashank held positions at Frenus Tech Pvt Ltd and Microchip Technology Inc., where significant contributions included EMIR signoff and physical verification in critical blocks. Shashank holds a Bachelor of Engineering degree in Electrical and Electronics Engineering from Vidyavardhaka College of Engineering.

Location

Karnataka, India

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