Amit Pandey

Amit Pandey is a Staff Engineer at MediaTek with over 6 years of experience specializing in CPU and GPU timing analysis and timing closure within complex SoC architectures. Amit's key contributions include timing verification and closure for high-performance subsystems, utilizing industry-standard tools like Synopsys PrimeTime. Amit began their career with roles as a Trainee at Prasar Bharati and a Summer Intern at the Research Design and Standards Organisation, and they hold a Bachelor of Technology from Guru Ghasidas Vishwavidyalaya and a Master of Technology from Motilal Nehru National Institute Of Technology. Passionate about precision and performance, Amit thrives in collaborative environments focused on building efficient, timing-robust CPU/GPU blocks for next-generation mobile and consumer electronics.