Jia-Wei Lin

Jia-Wei Lin is a seasoned engineer specializing in power integrity, currently serving as a Senior Power Integrity Engineer at MediaTek since September 2021. Previously, Jia-Wei held the position of Power Integrity Engineer at the same company. From December 2017 to September 2021, Jia-Wei worked at 台積電 as an Advanced Packaging Process Integration Engineer. Earlier experience includes a role as a N40 Process Integration Engineer Intern at United Microelectronics Corporation (UMC) in July 2015. Jia-Wei Lin earned a Master's degree in Electronic Engineering from National Chiao Tung University between 2015 and 2017 and a Bachelor's degree in Electronic Engineering from National Central University from 2011 to 2015.