Pratik Soni

Pratik Soni is a seasoned Digital Design Engineer with over 7 years of expertise in STA timing analysis and advanced timing fixes, utilizing tools like Tweaker and Primetime. They have a strong background managing timing closure for complex IPs, including PCIe Gen6 and high-performance digital blocks, and have a proven track record in overseeing chip-level STA signoff. Their collaborative work with Place and Route engineers has streamlined workflows and enhanced design efficiency. Pratik has also been dedicated to mentoring new engineers, contributing to a high-performing team environment, and optimizing design flows across various technology nodes.