Raja Arumugam is an ASIC Design Engineer currently at MediaTek, specializing in synthesis, floorplanning, CTS, routing, and physical verification for high-performance, low-power CPU implementation. Raja previously served as a Physical Design Engineer at Wipro Technologies from 2004 to 2010, and held the role of Technical Manager for a short period in 2016 at MediaTek, overseeing CPU implementation projects. Raja's academic background includes a Bachelor of Engineering in Electrical and Electronics Engineering from Bharathiar University and a Master of Business Administration from the University of Bradford.
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