Althaf Rahamathulla

Althaf Rahamathulla is an accomplished engineer with extensive experience in digital design, particularly in the semiconductor industry. At Cadence Design Systems, Althaf worked as a Principal Design Engineer on the Tensilica IP Design team, focusing on the design of configurable Xtensa processors. Following this, Althaf joined Meta as a Digital Design Engineer in the SOC creations team within the Wearables division at Reality Labs. Prior to these roles, Althaf served as a Staff Design Engineer and Senior Design Engineer at Western Digital, contributing to the 3-D BiCS NAND Flash Logic memory design team and specializing in various aspects of logic design and verification. Althaf holds a Bachelor's degree in Electrical and Electronics Engineering from Anna University and a Master's degree in Electrical Engineering from the University of Southern California.