Nitish N.

Nitish N. is an experienced ASIC Design Engineer currently at Meta, focusing on physical design implementation for AI processors. Nitish's career includes roles at Flex Logix Technologies, where successful tapeouts were achieved for multiple technology nodes, and at Oracle, where notable power optimization efforts were recognized with two SPRAC Processors Achievement Awards. Academic experience includes assisting in the VLSI Design and Verification course at V.E.S. Institute of Technology and conducting graduate research on temperature resilient clock distribution networks at Georgia Institute of Technology. Educational credentials encompass a Master's degree in Electrical and Computer Engineering from Georgia Institute of Technology and a Bachelor's degree in Electrical, Electronics and Communications Engineering from the University of Mumbai, alongside a diploma from Maharashtra State Board of Technical Education.