Umanath Kamath is an experienced engineer specializing in Analog Mixed-Signal IC design, currently serving as an Analog Mixed-Signal IC Design Engineer at Meta since December 2021. Umanath has held significant positions including Staff Design Engineer at SLAC National Accelerator Laboratory from December 2018 to December 2021, and Senior Design Engineer roles at both Xilinx and Cypress Semiconductor. Additional experience includes a Honeywell Innovator Scholar role at Honeywell Technology Solutions, Inc. and various internships including a Research Intern position at imec and an Analog Design Intern role at CMOSIS nv. Umanath's academic qualifications comprise a PhD in Electrical and Electronics Engineering from University College Dublin, a Master of Science in Microelectronics from Delft University of Technology, and a Bachelor’s degree in Electrical, Electronics, and Communications Engineering from M.S. Ramaiah Institute of Technology.
This person is not in the org chart
This person is not in any teams
This person is not in any offices