Anish George

Anish George is a Principal Engineer at Microchip Technology Inc. since March 2019, specializing in functional verification with a focus on CXL, PCIE, SAS, SATA, System Verilog, and Universal Verification Methodology (UVM). Prior to this role, Anish served as a Senior Technical Lead at Aricent from March 2015 to March 2019, primarily working with SAS and SATA technologies. Anish's earlier experience includes a position as Lead Engineer at Samsung Electronics from May 2012 to February 2015 and as a Senior Project Engineer at Wipro Technologies from January 2008 to May 2012, where responsibilities included functional verification of ASIC/IP using System Verilog and UVM. Anish holds a B.Tech in Electronics and Communication from Cochin University of Science and Technology, completed in 2007.