Kishori Kulkarni

Senior Layout Designer at Microchip Technology

Kishori Kulkarni is a seasoned professional with extensive experience in integrated circuit design and layout. Currently serving as a Tech Lead at Intel Corporation since May 2014, Kishori has been involved in key projects including Sigma-Delta ADC, Thermal Sensor IP, and SRAM fullchip porting and tapeout. Prior to this role, Kishori worked at Microchip Technology as a Senior Layout Designer since February 2012, focusing on custom layout design for I/O, memory, and analog components, along with chip-level verification. Earlier experience includes a position as a Senior Analog Layout Designer at KarMic from June 2004 to June 2010, where responsibilities included standard cell and I/O library development, as well as programmable I/O layout design using various signaling standards. Kishori holds a degree from B V B College of Engineering & Technology in Hubli.

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