Naseer Shaik

Naseer Shaik is a Principal Engineer at Microchip Technology Inc., where they currently focus on advanced ASIC and FPGA design. Previously, they held roles at Microsemi Corporation as a Senior Engineer, at Larsen & Toubro as an FPGA Design and SOC Validation Engineer, and at Vrinda Technologies as an FPGA Design Engineer. Naseer has extensive experience in writing RTL models in Verilog HDL, designing various interface controllers, and utilizing industry-standard EDA tools. Their expertise includes on-board debugging and creating test benches for RTL verification.