Sumit Rana is a Physical Design Engineer I at Microchip Technology Inc. since January 2022, previously serving as a Physical Design Intern. Prior experience includes a Project Intern role at CMTI - Central Manufacturing Technology Institute, where work focused on developing the ASIC design of a Signal Conditioner for Piezoresistive MEMS sensors. Additionally, Sumit was a Layout Design Intern at Epitome Circuits, contributing to the design of a tapless Standard Cell Library for various basic and universal gates. A Research Intern position was held at the Ministry of Electronics & Information Technology, Government of India. Education includes a Bachelor of Technology in Electronics and Communications Engineering from Vellore Institute of Technology, where involvement as a Program Representative occurred from September 2018 to October 2019. Sumit completed earlier education at Army Public School, Delhi Cantt, from April 2008 to May 2017.
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