Suryakanth Nayak is currently a Principal Verification Engineer at Microchip Technology, where they develop advanced verification methodologies. Previously, they served as a Senior Verification Engineer at Microsemi Corporation and a Senior Design Engineer at Tessolve Semiconductor PVT LTD, focusing on UVM verification environment development and RTL debugging. Suryakanth also worked as a Verification Engineer at Xilinx, maintaining and troubleshooting legacy core verification. Their early experience includes a role as an SoC Engineer at Aims Technology Inc., where they focused on RTL debugging and test bench environment development. Suryakanth is pursuing education at Vignan Institute of Technology & Sciences.
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