Chandrakanth Rapalli is a seasoned engineer with extensive experience in ASIC design and semiconductors, having worked at Micron Technology from January 2019 to November 2021 in various senior technical roles, including Principal ASIC Design Engineer and Distinguished Member of Technical Staff. Prior to this, Chandrakanth held positions at SanDisk as a Senior Staff ASIC Design Engineer and at Intel Corporation as a Senior SoC Design Lead. Additional experience includes consulting at BHEL R&D, working as a Specialist at Tata Elxsi, and roles at HCL Technologies and InfoTech Enterprises. Educational qualifications include a Bachelor of Technology in Electrical, Electronics, and Communications Engineering from Kamala Institute of Technology & Science and a Master of Science in VLSI and Embedded Systems from the International Institute of Information Technology, Pune.
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