Ping Zhou is a Principal Engineer Lead at Micron Technology, where responsibilities include leading the regE, CMP, and NEO teams to advance 3D NAND N+1 and N+2 technologies focused on yield improvement and cost reduction since October 2017. Previously, at Micron Technology, served as a Senior Engineer, specializing in NAND Technology Integration to enhance wafer edge processes and integration for advanced 3D NAND technologies. Prior experience includes a role as a Senior Process Engineer at GLOBALFOUNDRIES, managing Cu CMP processes, and as a Process Engineer at SK hynix, overseeing Poly Gate CMP and W CMP processes. Ping Zhou holds a Bachelor's degree in Mechanical Engineering from Hefei University of Technology.
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