Nishant Pathak

Nishant Pathak is a Senior Physical Design Engineer at Mirafra Technologies since September 2020, with prior experience as a Physical Design Engineer at Cientra from June 2016 to September 2020 and as a Physical Design Engineer - I at Mindlance Technologies for a brief period in June 2016. Nishant started a career in the field as a Technical Intern at STMicroelectronics from June 2015 to May 2016, focusing on power and signal integrity of ASIC design utilizing industry-standard sign-off tools such as RedHawk and PrimeTime. Academic credentials include a Master of Technology (M.Tech.) in VLSI Design from Nirma University (2014-2016) and a Bachelor of Technology (BTech) in Electrical, Electronics and Communications Engineering from DDU (2009-2013).